In the context of the fourth industrial revolution along with unprecedented growing global interdependencies, an innovative, inclusive and sustainable society is a sound European priority. For many people, the way towards inclusive and sustainable daily life goes through a lightweight in-ear device allowing speech-to-speech translation. Today, such IoT devices require internet connectivity which is proven to be energy inefficient.
While machine translation has greatly improved, an embedded lightweight energy-efficient hardware remains elusive because existing solutions based on artificial neural networks (NNs) are computation-intensive and energy-hungry requiring server-based implementations, which also raises data protection and privacy concerns. Today, 2D electronic architectures suffer from "unscalable" interconnects, making it difficult for them to compete with biological neural systems in terms of real-time information-processing capabilities with comparable energy consumption. Recent advances in materials science, device technology and synaptic architectures have the potential to fill this gap with novel disruptive technologies that go beyond conventional CMOS technology. A promising solution comes from vertical nanowire field-effect transistors (VNWFETs) to unlock the full potential of truly 3D neuromorphic computing performance and density. Through actual VNWFETs fabrication setting up a design-technology co-optimization approach, the FULLMONTI vision is to develop regular 3D stacked hardware layers of NNs empowering the most efficient machine translation thanks to a fine-grain hardware / software co-optimisation. FULLMONTI consortium is a strong partnership with complementary expertise and extensive track-records in the fields of nanoelectronics, unconventional logic design, reliability, system‐level design, machine translation, cognition sciences. The consortium is composed of 50% of junior researchers and 90% of first-time participants to FETPROACT.
Global objective: Through actual VNWFET fabrication setting up a design-technology co-optimization (DTCO) approach, the FVLLMONTI vision is to develop regular 3D stacked hardware layers of NNs empowering the most efficient machine translation thanks to fine-grain hardware / software co-optimisation.
FVLLMONTI is organized around 4 specific objectives (OBJ) targeting 12 Key Performance Indicators (KPI) mastered through 16 Milestones (MS):
Objective 1: Compactness: From fabricated low-complexity hardware to minimal neural network compute cube (N2C2)
Specific objective 1 (OBJ1) concentrates on the compactness of the elements in the FVLLMONTI value chain from low-level logic blocks up to a critical compute function in N2C2 to ensure the computation resource footprint.
Objective 2: Performance: Energy-delay-product assessment of the computational layer, the embedded Non-Volatile Memory (e-NVM) and interconnects
Specific Objective 2 (OBJ2) is designed to quantify the conventional figure-of-merit energy-delay-product (EDP) towards fast and ultra-low-power data transfer between the e-NVM using ferroelectric-gated VNWFET and the computing layer, thereby addressing the whole FVLLMONTI value chain from low-level logic blocks up to a critical compute function in N2C2.
Objective 3: Validation of the VNWFET technology for live English-French streaming speech recognition to text
Specific Objective 3 (OBJ3) focuses on exploring the use of VNWFET-based 3D logic cells and e-NVM blocks in multiple layers of NNs enabling ultra-compact and energy-efficient Transformers NNs for Automatic Speech Recognition (ASR) and Machine translation (MT). Their compactness and EDP will be compared with general-purpose architectures with CNN accelerators. To validate the approach, the target application is live English-French streaming speech recognition to text.
Objective 4: 3D NN architecture robustness
Specific Objective 4 (OBJ4) assesses the reliability of VNWFET devices at the early step of their development. The impact of the identified wear out failure mechanisms will be appraised on the whole FVLLMONTI value chain: N2C2, 3D NN architecture and up to the ASR and MT application. Beyond the specific translation application, the final intent is to demonstrate the intrinsic 3D NN architecture robustness.
This project has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement No 101016776.
Invited talk at the Design Automation and Test in Europe (DATE) 2022
HiPEAC Article on FVLLMONTI now available
Workshop at the HiPEAC Computing System Week
1st Advisory Board meeting (Bordeaux, France)
Invited paper at IEDM 2021, the 67th Annual International Electron Devices Meeting
Video recording available for FVLLMONTI presentation at NEUROTECH
NEUROTECH online event
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